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Mod Modules Why do we choose FPGAs? Usually because we want to get our design to market faster, cut our design cost and risk, and have more flexible, versatile products at the end. Because the process of customizing the FPGA is getting increasingly efficient, the development of a working board is rapidly becoming the long pole in the tent of our design process. Today, design teams are spending as much time getting the FPGA to work properly on the board and connected to the outside world as they are on any other major phase of the process. Wouldn’t it be nice if we had a solution for the board problem that did exactly what the FPGA does for the silicon? What if we could use a pre-designed and fabricated module that we could take from prototyping through early production without having to ever fire up our PCB design software? Development boards have been in use for years that provide us all the connections and interfaces we might need during development, but these are typically too big, bulky and expensive to even consider for early production use. What we’d like is a middle option between a development board and a custom PCB that would allow us to start production quickly at a reasonable cost and with a production-worthy vehicle. Ultimodule is offering us just that with their new line of cost-optimized FPGA-based circuit modules. Each module is like our familiar development board, only cost- and size-optimized with a mix of connectors and interfaces that is near optimal for a wide variety of applications. These little circuit boards are versatile enough to use for development and prototyping work, and inexpensive enough for early production for many end applications. [more]
Fifteen years ago verification of FPGA designs was easy: you only needed a decent gate-level simulator to verify a circuit containing several thousands of logic elements. As the size of FPGAs started to grow, so did the complexity of the designs implemented in them. Over time, hardware description languages sneaked into schematic designs and eventually replaced schematic entry. Today, it is quite common that FPGA users have to deal with more than one language in their designs (e.g. original sources in VHDL with some IP core in Verilog). At earlier stages of the design development it may be necessary to interface HDL simulation with environments using Domain Specific Languages, such as Matlab. To speed up testbench simulations, patches written in C/C++ are used frequently. Sometimes, when simulation is still too slow, hardware acceleration may be necessary. In the last two years embedded systems found their way into the FPGA domain, adding one more headache - how to test both system software and system hardware in the simulation environment not prepared for this task. [more] |
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